Bipolar transistors are old and well known in the art. Generally, a bipolar transistor is disposed in a semiconductor body having opposed major surfaces. It has emitter and collector regions formed of impurity of one conductivity type adjoining the separate opposed major surfaces, and a base region formed of impurity of the opposite conductivity type at least partially in the interior of the semiconductor body between the emitter and collector regions. Two PN junctions are thus formed in the semiconductor body, one at the transition between the emitter and base regions and one at the transition between the collector and base regions.
Bipolar transistors with high power capability have been generally restricted to low frequency operation, i.e., below 2 megahertz. This restriction is because of the competing requirements for impurity concentration uniformity in the base and for narrow base widths, e.g. 5-10 microns, for high power, high frequency operation. The cut-off frequency response is directly proportional to D/X.sub.B.sup.2, where D is the minority carrier diffusion length in the base region and X.sub.B is the thickness of the base region. Therefore, the thicker the base, the lower is the cut-off frequency for the transistor.
Single alloyed transistors (that is, where the collector and emitter regions are simultaneously alloyed) have been typically made to provide high power devices (i.e., a large safe operating area) for operation in the 0.5 - 1.0 megahertz frequency range. Such alloyed devices provide rugged performance for regulating, controlling and switching applications in that frequency range. However, the base widths of such alloyed devices are typically not narrower than about 50 microns because the alloying depth can be controlled to only .+-.5 microns and the thickness of commercial semiconductor wafers is controlled to only .+-.2.5 microns. The margin of error is too great to permit narrower base widths and still provide commercially acceptable manufacturing yields. Therefore, alloyed transistors have been practically restricted to cut-off frequencies below about 1 megahertz.
Single-diffused transistors (that is, where the emitter and collector regions are simultaneously diffused) have resulted in high power devices capable of operation in the 1 to 2 megahertz range. However, the base widths of such single-diffused transistors are typically greater than 20 microns because the deep diffusion that is required can be controlled to only .+-.2 microns and again the thickness of commercial semiconductor wafers is controlled to only .+-.2.5 microns. Again the margin of error is too great to permit narrower base widths and still provide commercially acceptable manufacturing yields.
Transistors with cut-off frequencies above 2 megahertz have, of course, been commercially made by double diffusion and epitaxial single diffusion techniques. However, the power capacity of such devices are low. In the double diffused transistor (that is, where the base and emitter regions are sequentially diffused), the impurity concentration is not axially uniform and in turn the base cannot carry as high a current density because of the resulting electric field gradient and minority carrier acceleration.
Moreover, the higher the frequency is, the higher the current density which must be carried by the transistor to attain a given power level. And the higher the current density and the narrower the base width, the more susceptible the transistor is to thermal runaway. That is, the electrical characteristics of the transistor vary from area to area resulting in non-uniform current densities. This non-uniformity in turn causes increased current densities in the area of highest density, resulting in localized overheating and eventually catastrophic breakdown and failure.
Therefore, even epitaxial base diffused emitter transistors have been limited in their power capacity. For this reason, a plurality of transistors are usually connected in parallel to provide for high power, high frequency operation. Such parallel operation, however, drastically lowers the input impedance of the transistor at high frequencies and in turn cause instability in the operation of the transistor. Further, this impedance decrease, correspondingly increases the Q of the device and makes impedance matching with external circuits exceedingly difficult without added complex circuitry.
A related problem in high power, high frequency operation is the size of the emitter contact to meet the high current requirements for high current density operation. The emitter contact has the same power handling requirements as the collector contact. Yet an epitaxial base diffused emitter transistor typically employs an emitter contact of evaporated aluminum of only about 3-7 microns in thickness. Similarly, a single diffused transistor typically employs an emitter contact of titanium-nickel alloy of only 1.5-2.5 microns in thickness, coated with 95 percent tin --5 percent lead alloy solder. These contacts are not adequate to carry the high current levels needed for high current density, high frequency operations.
The present invention overcomes these difficulties and disadvantages. It provides a high power transistor capable of operation in the 2-10 megahertz range. The invention utilizes the advantages of alloy transistors in high current emitter contacts while eliminating the problem in alloy transistors of base width control. Further, the invention provides a transistor which can readily be made with presently available production apparatus for making commercial transistors.